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Possible PS5 leak info

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Geki-D

Geki-D

Banned
HeisenbergFX4 said:
but if they are fake then the people making these are getting really good at it.
Click to expand...
They've always been pretty good.
Nintendo-NX-Controller-Large-Small-1200x664.jpg


 
Armorian

Armorian

Banned
ColdToffee said:
Is there any advantage for 16T over 8T on a 8C cpu for a console? (outside of VR stuff)
I'm finding that 8c/16t leak hard to believe.
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Same advantage as for 4c i5 vs 4/8t i7, and that's quite large in many recent games. Developers will start making 12+ threded engines (right now only few games make use of more than 8t). There are no 8/8 Ryzens and I don't see any reason why AMD would make them specificaly for consoles.
 
Ar¢tos

Ar¢tos

Member
Armorian said:
Same advantage as for 4c i5 vs 4/8t i7, and that's quite large in many recent games. Developers will start making 12+ threded engines (right now only few games make use of more than 8t). There are no 8/8 Ryzens and I don't see any reason why AMD would make them specificaly for consoles.
Click to expand...
I thought Ryzen came in 8/8 and 8/16.
 
P

Panajev2001a

GAF's Pleasant Genius
Armorian said:
Same advantage as for 4c i5 vs 4/8t i7, and that's quite large in many recent games. Developers will start making 12+ threded engines (right now only few games make use of more than 8t). There are no 8/8 Ryzens and I don't see any reason why AMD would make them specificaly for consoles.
Click to expand...

SMT or HT is more of an efficiency boost than a performance boost. The good thing is that it is quite cheap: Intel estimates the chip becomes approximately 5% larger as a result.

The short version of things is that SMT is allowing the processor to fetch and feed instruction from multiple thread to the shared execution units and to do this it adds an extra tag to the instructions in the processor cache to mark which thread they belong to and add some extra HW resources to hold instructions from multiple thread throughout the entire processor’s pipeline (you may want to increase the cache, increase the register file size [physical not program visible registers], increase various buffers in the entire pipeline to keep track of extra per instruction information and to store more instructions period [to analyse data dependencies, predict branches, etc...], etc...).

The benefit is related to the disparity between actual execution resources and the way human made / compiler aided software is able to take advantage of what is available in the processor itself: it is no use if you have a sea of integer and float processing units, special function units (think trig functions), load and store units to move data in and out of memory, encryption acceleration units, etc... if you starve them. This is especially bad if another thread of execution has work for the processor to do and it is waiting for the current thread to finish or to recover from a stall (cache miss / load from memory, branch mispredict, etc...).

In very very controlled environment with particularly optimised software workloads it could in theory reduce performance unless the design of the chip is allowed to go a bit past the points of diminishing returns for single threaded workloads (where adding more and more resources would not make any single thread going that much faster).
Think about it like this: if say you have enough HW grunt to keep one thread performing at 0.80 efficiency and two threads at 0.70 efficiency, if you increase resources to the core you may not move the needle much in the single thread scenario going to 0.81, but when running multiple concurrent thread you may now have the processor efficiency boosted to 0.84

A popular form of chip multi threading optimisation that used to be quite popular is known as SoE MT or Switch on Event Multi Threading which is s form of so called coarse trained multi threading: the CPU would automatically switch thread and feed itself from it when a cache miss or a branch mispredict occurred.

SMT / Simultaneous Multi Threading / Hyper Threading takes that one step further and the processor, unless disabled, is allowed to simultaneously load and execute instructions from one or more of the available running threads... The processor is able to present itself as two cores (or four or more depending on how many HW threads it can process concurrently) to the OS it is running under. SMT is also known as a form of fine grained multi threading.
 
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Geki-D

Geki-D

Banned
bitbydeath said:
The only way he'd know this is fake is if he's seen the real thing right?
I think he was just guessing.
Click to expand...
Not really. He's a journo with connections so he most likely just asked some devs. In fact I'm pretty sure that's exactly what he did.
 
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F

Freeman454

Member
Panajev2001a said:
SMT or HT is more of a cheap efficiency boost than a performance boost. The good thing is that it is quite cheap, Intel estimates about the chip becoming 5% larger as a result.

The idea behind it is to use extra space in the cache to tag instructions belonging to different threads, add some extra HW resources (you may want to increase the cache, increase the register file size [physical not program visible registers], increase various buffers in the entire pipeline to keep track of extra per instruction information and to store more instructions period [to analyse data dependencies, predict branches, etc...], etc...).

The benefit is related to the disparity between actual execution resources and the way human made / compiler aided software is able to take advantage of what is available in the processor itself: it is no use if you have a sea of integer and float processing units, special function units (think trig functions), load and store units to move data in and out of memory, encryption acceleration units, etc... if you starve them... especially if another thread of execution has work for the processor to do and it is waiting for the current thread to finish or to recover from a stall (cache miss / load from memory, branch mispredict, etc...).

In very very controlled environment with particularly optimised software workloads it could in theory reduce performance unless the design of the chip is allowed to go a bit past the points of diminishing returns for single threaded workloads (where adding more and more resources would not make any single thread going that much faster).
Think about it like this: if say you have enough HW grunt to keep one thread performing at 0.80 efficiency and two threads at 0.70 efficiency, if you increase resources to the core you may not move the needle much in the single thread scenario going to 0.81, but when running multiple concurrent thread you may now have the processor efficiency boosted to 0.84

A form of chip multi threading optimisation was called SoE MT or coarse trained multi threading: the CPU would automatically switch thread and feed itself from it when a cache miss or a branch mispredict occurred.

SMT / Simultaneous Multi Threading / Hyper Threading takes that one step further and the processor, unless disabled, is allowed to simultaneously load and execute instructions from one or more of the available running threads... The processor is able to present itself as two cores (or four or more depending on how many HW threads it can process concurrently) to the OS it is running under and it is also known as a form of fine grained multi threading.
Click to expand...

Former PS2 dev right?
 
P

Panajev2001a

GAF's Pleasant Genius
Freeman454 said:
Former PS2 dev right?
Click to expand...

PS2 Linux kit consoles wise I am afraid :), but happy to take the same low level approach, thanks to the SPS2 kernel module, as you would have had to take on a dev kit: essentially it was like developing on the TOOL (the PS2 dev kit), but with only 16 MB of usable main RAM (the SPS2 module could only guarantee 16 MB of non swappable memory [swapping to and back from the HDD would have killed performance] with 4KB physically contiguously allocated pages, so you had to split your DMA chains in multiple tags aligning on a per page boundary, which real devs did anyways for better bud utilisation... DMA engine was not able to do virtual to physical address translation, Sony fixed that in PS3’s SPU’s), no direct access to the I/O CPU, a bit more CPU overhead with Linux loaded, etc... actually it was better in some cases as we had a visual VU+GIF+GS debugger very early on and before the official dev kits IIRC, thanks to great work by the community around it.

VU code was helped by a sort of preprocessor that allowed you to use variable instead of the exact register name in the VU micro-code. Still, you had al the fun of writing your DMA handling code by hand, your VIF tags to tell the VU how to unpack data and setup its memory (dual or quad buffering were very popular), writing your Transform, Clip, and Light ASM code for the VU1 (learning about super cool things like the “kill” bit in each vertex’s w coordinate that allowed the GS to discard degenerate triangles connecting objects together... ideally it is great if you can use a giant triangle strip and hide the triangles connecting separate objects ;)), writing your GIF and GS tags and when making a mistake meant you had to reboot the entire machine hehe... sorry for the rant... reminiscing on good days :).
 
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Shin

Shin

Banned
GoldenEye98 said:
"It could happen March 2020 or in the fall"....I mean it's not exactly a bold statement he's making there.
Click to expand...
It's nothing new either, from what I've noticed almost everything comes back to dates and specs of what RuthenicCookie said some months ago.
Including the E3 skipping thing so that tells me it's the most reliable information we have at the moment and the rest is...well yeah.
 
Fake

Fake

Member
If Nintendo really launch 2 new Nintendo Systems I can agree that Sony could launch or at least 'talk' about PS5 most soon than expected.
 
HeisenbergFX4

HeisenbergFX4

Member
Those "insiders" on the other site are all saying all the Devs have PS5 DevKits including 3rd party Devs.

I find that very hard to believe with no real leaks as of yet.
 
TLZ

TLZ

Member
Shin said:
It's nothing new either, from what I've noticed almost everything comes back to dates and specs of what RuthenicCookie said some months ago.
Including the E3 skipping thing so that tells me it's the most reliable information we have at the moment and the rest is...well yeah.
Click to expand...
I forgot what they leaked, do you have all the info?
 
TLZ

TLZ

Member
bitbydeath said:
No, the more interesting part was the built-in VR where you only need to pay for a cheap $100 or so headset instead of having all the tech inside the HMD.
Click to expand...
Hmm. I just got the no breaker box part, and it does have a camera along with the controller.
 
Shin

Shin

Banned
Someone can make a thread about it all, I'm too lazy.

https://www.pcgamesn.com/amd/next-gen-zen-navi-console-apu-playstation-5-xbox-codename

https://www.reddit.com/r/Amd/comments/bbjdba/amd_gonzalo_zg16702ae8jb2_321018_13f8/

https://pci-ids.ucw.cz/read/PC/1022 - "13F8" goes here

https://external-preview.redd.it/z8ytrTdsq_F_gAgrIuy1NiqPegn5kWNlIjOEX5WenFU.png?auto=webp&s=de8ae53e311c4605c0ff76d2cf634edec1db48e6



ZG16702AE8JB2_32/10/18_13F8

Z: QS (Qualifying Sample, last stage before production)
G: Gaming? (Probably a console chip)
1670: Base clock of 1,67GHz
2A: Unkown TDP
E: Unknown package
8: 8 Core's
J: Unknown cache configuration
B2: Unknown stepping
32: Boost clock of 3,2Ghz
10: This was the base clock before but as this is might be an APU, this could also be the number of CU's?
18: GPU clock of 1,8Ghz?
13F8: Looks like a PCI-e identification number for a Navi generation GPU. (Probably a Navi 10LITE derivate)
Click to expand...
 
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Fake

Fake

Member
CurryPanda said:
I don’t understand any of those links. What are the specs?
Click to expand...
-CPU is Zen+ or Zen2 ("We couldn’t confirm whether the architecture used within the CPU was Zen+ or Zen 2, but it was suspected to be the former due to the numeral representing the cache size. ")
- 8 physical cores
- 1.6 GHZ base clock (maybe standby), boost clock at 3.2GHZ
- GPU is Navi 10Lite GPU
- '10' could mean 1.0GHz clock (PS4pro GPU runs at 911MHz)
- The last code says '18', so the dev kit could be get a updated gpu clock speed at 1.8GHz
 
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CyberPanda

CyberPanda

Banned
~Fake said:
-CPU is Zen+ or Zen2 ("We couldn’t confirm whether the architecture used within the CPU was Zen+ or Zen 2, but it was suspected to be the former due to the numeral representing the cache size. ")
- 8 physical cores
- 1.6 GHZ base clock (maybe standby), boost clock at 3.2GHZ
- GPU is Navi 10Lite GPU
- '10' could mean 1.0GHz clock
- The last code says '18', so the dev kit could be get a updated gpu clock speed at 1.8GHz
Click to expand...
How many TFLOPs are we looking at?
 
TLZ

TLZ

Member
~Fake said:
-CPU is Zen+ or Zen2 ("We couldn’t confirm whether the architecture used within the CPU was Zen+ or Zen 2, but it was suspected to be the former due to the numeral representing the cache size. ")
- 8 physical cores
- 1.6 GHZ base clock (maybe standby), boost clock at 3.2GHZ
- GPU is Navi 10Lite GPU
- '10' could mean 1.0GHz clock (PS4pro GPU runs at 911MHz)
- The last code says '18', so the dev kit could be get a updated gpu clock speed at 1.8GHz
Click to expand...
Thanks. What do we know about the Navi 10 lite? I remember seeing it mentioned not long ago.

Edit: Oh, and what if that last number, 18, is the number of rams that OsirisBlack OsirisBlack leaked?

OsirisBlack said:
AMD Ryzen cpu custom configuration 3.20 , 7nm Navi gpu 2.1 18gddr5 Is what I heard a while ago. As far as the public announcement It will be soon. I sent this info to a mod a while ago I couldn’t post until something else leaked first. I’ll post everything now that something semi accurate is out there.
Click to expand...
 
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Fake

Fake

Member
TLZ said:
Thanks. What do we know about the Navi 10 lite? I remember seeing it mentioned not long ago.
Click to expand...
No much. 'lite' used to be a custom 'low energy efficient' term I guess. Both GPU and CPU from PS5 need to have low energy settings for reduce energy consumption while download or standby. CPU could be Ryzen+ or Ryzen2, but its already a win to win. Besides, people are not happy with the base 1.6GHz initial clock speed, but if I remember right they choise 1.6GHz for Backwards Compatibility , just a way to 'simulate' the PS4 cpu.
It has also been speculated that this chip could be that of Microsoft’s next-gen Xbox.
Click to expand...
 
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Kazekage1981

Kazekage1981

Member
Has AMD made any advancements to HUMA processing for both the CPU and GPU? I remember discussions in Neogaf with ps4 and xbox leaks that jaguar had some elements of HUMA but not all.
 
bitbydeath

bitbydeath

Member
This one posted?

  • I'm a third party small developer from EU,for the last 8 months i've been helping a well known company in a AAA game development that is set to release in 2020 as a lunch game for PS5.
  • Some infos that i'd like to share that are 99% correct(i say 99% because small incremental hardware change can occur till 2020,although specs are set in stone).
  • -PS5 official info from Sony somewhere around next E3(Sony will not be participating on E3),i'd say Q2 2019 small reveal
  • -PS5 release March 2020 or November 2020,not yet finalized
  • -backward compatible
  • -physical games & ps store
  • -ps plus & ps plus premium ( premium-beta early access,create private servers,
  • -specs CPU 7nm ryzen 8 core 16 threads,unknown speed
  • GPU 7nm Navi arhitecture around 14TF,its gonna be powerful and power efficient,Sony working with Amd for Navi,some sort of Ray Tracing but will not focus on that,more focus with VR and 4k,much better bandwith overall
  • 24GB Gddr6 + 4gb ddr4 for os,we have 32 gb dev kits
  • -2tb hdd some sort of nand flash
  • -8k upscaling
  • -PSVR2 in 2020 also,reveal with ps5,big resolution boost probably 2560x1440,120hz,220 field of view,eye tracking,wireless,battery life 4-5 hours,headphones integrated,less motion sickenss,no breaker box,much less cable management,much more focus on VR for aaa games,price around 250$
  • -dualshock 5,some sort of camera inside for VR,more analog precision for fps games,something similiar to steam analog trackpad
  • -price 499$,100$ loss per console at a beginning
  • Ps4 exclusive launch games that i know of
  • Gran Turismo 7 (vr)
  • Pubg remaster 4k f2p with ps+ only on ps5
  • Last of us 2 remaster
  • Ghost of Tsushima remaster
  • 2-3 aaa games more + psvr2 games
  • Non exclusive ps5 games 2020
  • Battlefield bad company 3
  • Harry potter
  • Gta 6 Holiday 2020 most probably,not hearing anything ps4 related (hearing that Sony is paying huge money to secure 1 month time exclusive for ps5). Been hearing rumors about Miami and New York,so 2 big cities,but im not sure if thats 100% true
  • Assassins creed
  • Horizon 2 so far in 2021
Click to expand...

https://pastebin.com/PY9vaTsR
 
DadEggs

DadEggs

Member
bitbydeath said:
This one posted?



https://pastebin.com/PY9vaTsR
Click to expand...


when was that posted? pre premium announcement?

that list of games doesnt make sense based off their job description. i mean if they are helping a AAA studio why would they know all of that top secret information?

I GUARANTEE people working IN aaa 1st party studios on actual ps5 games dont even know all of that info and this person is some rando small dev studio assisting a big aaa studio, which is unclear that its even 1st/2nd/or 3rd party.
 
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